Efficient Multiplication and Division Using MSP430

Multiplication and division in the absence of a hardware multiplier require many instruction cycles, especially in C. This report discusses a method that does not need a hardware multiplier and can perform multiplication and division with only shift and add instructions. The method described in this application report is based on Horner’s method. The MSP430 microcontroller CPU can perform a register shift or add in one instruction cycle. This allows fast execution of multiplications and divisions using Horner’s method. This method not only produces accurate results but also provides a very good dynamic range as it does not totally depend on finite word length effects like some of the conventional methods. Also discussed is the Canonical Signed Digit (CSD) representation of numbers which further reduces the computational load when used with this method for multiplication and division. Note that Horner's method requires the multiplier or the divisor to be known in advance to function. Numbers can be broadly classified as fixed point and floating point. The fixed-point number representation is limited to positive and negative integers, whereas the floating-point number representation can accommodate fractions as well. Microcontrollers are fixed-point machines and deal with only fixed-point arithmetic. Hence, alternate methods need to be devised to handle floating-point arithmetic. This also leads to a loss in precision due to finite word length effects. Most microcontrollers do not have a hardware multiplier and rely on algorithms based on repeated addition to perform multiplication and division operations. This consumes a lot of instruction cycles and also exhibits limited precision. The Horner’s method discussed here is tailor-made for such machines without much loss in precision. The Horner’s method requires the multiplier or the divisor to be known in advance. This is not a serious limitation, since few applications perform multiplication or division of numbers that change at runtime. Once this is established, the multiplication or division can be performed efficiently with just shift and add operations. The operand is denoted by X, the multiplier by M, and the divisor by D. In explaining this method, first is considered the multiplication of two unsigned fractions. Let the number 0.12345 be multiplied by the constant 0.14325. The 12-bit binary representations of these numbers are: X = 0.12345 = 0.000111111001b M = 0.14325 = 0.001001001010b SLAA329–September 2006 Efficient Multiplication and Division Using MSP430 1 Submit Documentation Feedback www.ti.com Horner’s Method The conventional method to perform this multiplication is: 0.12345 × 0.14325 = (0.000111111001b)(2 + 2–6 + 2–9 + 2–11) = 0.000000111111b + 0.000000000111b + 0.000000000001b + 0.000000000000b 0.000001000111b = 0.017333984375 The correct result of this multiplication is 0.0176842125, and the above method results in an absolute error of 0.000350228125, which is approximately 1.5 LSB. This error can be attributed to finite word length effects due to register width limitations. As the number of bits allocated for the fractions increase this error is reduced. The Horner’s method aims to reduce this error while maintaining the same register widths. The Horner’s algorithm is based on the positions of the 1s in the multiplier and their distance to the immediate 1 to their left. This is done starting from the rightmost bit position and moving left until the last 1 before the binary point. In the binary equivalent of the multiplier 0.14325 = 0.001001001010b, starting from the right the first 1 occurs at bit position 2–11. The difference in position of this 1 to its immediate 1 to the left is two. Similarly the difference for the 1 in bit position 2–9 is three and so on. If the number to be multiplied is denoted as X, the design equations can be written as: Step 1: Set the intermediate result equal to the operand X and start with the rightmost 1 X × 2–2 + X = X1 For the first iteration, the weight 2–2 is applied to the intermediate result as the distance of the rightmost 1 (bit position 2–11) in the multiplier to its next 1 (bit position 2–9) is two. The operand X is added to account the occurrence of the 1 at bit position 2–9. The result of this addition is now stored as the intermediate result after this step. Step 2: Proceed to the next 1 in bit position 2–9 X1 × 2–3 + X = X2 The weight 2–3 is now applied to the intermediate result (updated in Step 1) since the distance of the 1 in bit position 2–9 to its next 1 (bit position 2–6) is three. The operand is again added for the reason explained in Step 1. Step 3: Proceed to the next 1 in bit position 2–6 X2 × 2–3 + X = X3 The weight 2–3 is applied to the intermediate result (updated in Step 2) and the operand added. Step 4: Proceed to the last 1 in bit position 2–3 Final result = X3 × 2–3 The factor 2–3 is applied to the intermediate result (updated in Step 3), as it is the weight at the position of the leftmost 1. The operand is not added this time, since all the 1s have been taken into account. Efficient Multiplication and Division Using MSP430 2 SLAA329–September 2006 Submit Documentation Feedback